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Вы здесь » Ремонт ноутбука своими руками. » HP, Sony » HP 6720S starts with black screen


HP 6720S starts with black screen

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1

Good afternoon!

Hp 6720s- platform: DDD UMA 6050A2137901-MB-A03

When started, fan spins continuously but no display on screen and external monitor.

Current reading : 0.003-0.48 and stopped at 0.68

Steps made :

Replaced ram, and cpu, with known good working ones, same problem.
Flashed bios, reflowed GPU for test purpose to no avail.

Tested voltages ok  :
-CPU voltages : Vcc_Core :+1.12V; VCCP : +1.18V; +V1.5S : +1.7V a little high
H_Pwrgd and H_Cpurst#: +1.18V

GPU voltages : +1.18V; +1.44V; +2.08V

All other voltages are ok except :

-At CN17 (lvds connector) :
+V3A(pins 18-19-20) is missing due to "LVDS_VDD_EN" absent.
LVDSA_DATA pins signals are also absent.

-Bios (soic8) pins 1 and 2 always 3.54v strange !!!

Please advise as where to dig further ! Bios, I/O or other component !

0

2

Нello .

Judging by the given values of all voltages, everything should work.
H_Cpurst# (high level) - this is the final signal to start the system and the transition to execute instructions of the bios .

LVDS_VDD_EN signal which goes from North bridge
That would have opened the MOSFET Q502 , you need to be open Q22 and Q23
There must be both signals : LVDS_VDD_EN and SLP_S3#_3R
What level has SLP_S3#_3R ?
If you remove Q22, does not change whether the level LVDS_VDD_EN ?

I think before you signal LVDS_VDD_EN will be at a high level , must be read in the data from the matrix by means of signals : LVDS_DDC_CLK and LVDS_DDC_DATA

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3

freeqwer написал(а):

Nello.

Judging by the values ​​of Given All voltages, everything Should work.
H_Cpurst # (High Level) - this is the signal to start Final the system and the Transition to Execute instructions of the bios.

Bios (Soic8) pins 1 and 2 measured 3.54v with lap switched on, strange isn't it !!! If so, bios may be then prevented to excecute instructions.-

freeqwer написал(а):

Which LVDS_VDD_EN signal goes from North Bridge
That Would have Opened the MOSFET Q502, you need to be Q22 and Q23 Open
There must be Both signals: LVDS_VDD_EN and SLP_S3 # _3R
What Level has SLP_S3 # _3R?
If you Remove Q22, does not Change Whether the level LVDS_VDD_EN?

The schematic shows Q22 and Q23 but on the mobo only Q22 exists grounded directly and activated by LVDS_VDD_EN#. (no Q23 so SLP_S3 # _3R is not needed for gate activation)

freeqwer написал(а):

I think before you signal LVDS_VDD_EN will be at a high level, must be read in the data from the matrix by means of signals: LVDS_DDC_CLK and LVDS_DDC_DATA

LVDS_DDC_CLK and LVDS_DDC_DATA signals are present.

Any suggestion as where to dig further should be appreciated.

Thanks for reply.

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4

mohkamtun написал(а):

The schematic shows Q22 and Q23 but on the mobo only Q22 exists grounded directly and activated by LVDS_VDD_EN#. (no Q23 so SLP_S3 # _3R is not needed for gate activation)

I look under the scheme DDD UMA
here q23 - available
Well, if there is no q23 on your Board,  means - no :)

However : If you Remove Q22, does not Change Whether the level LVDS_VDD_EN?

mohkamtun написал(а):

Bios (Soic8) pins 1 and 2 measured 3.54v with lap switched on, strange isn't it !!! If so, bios may be then prevented to excecute instructions.-

Yes, it's weird.
It turns out that data transfer is not carried out
I suggest to try to replace eeprom

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5

freeqwer написал(а):

I look under the scheme DDD UMA
here q23 - available
Well, if there is no q23 on your Board,  means - no

Yes I got the same scheme with Q22 and Q23 but mobo is a variant : Q22 is directly connected to ground (not through Q23)

freeqwer написал(а):

However : If you Remove Q22, does not Change Whether the level LVDS_VDD_EN?

Removed Q22, no change, always LVDS_VDD_EN# absent.

freeqwer написал(а):

Yes, it's weird.
It turns out that data transfer is not carried out
I suggest to try to replace eeprom

Replace or redump.

0

6

mohkamtun написал(а):

Replace or redump.

Replace
later redump  8-)

If the problem is not solved , then think to look in the direction of the southern bridge, as SPI_CE#   and    SPI_SO come from ICH8.

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7

freeqwer написал(а):

Replace
later redump  

If the problem is not solved , then think to look in the direction of the southern bridge, as SPI_CE#   and    SPI_SO come from ICH8.

I've to order overseas a new bios, as they're not available over here.
Meanwhile, I'll try to redump the original bios and have a look around SB as you suggest.

Will feed back soon.
Thank you

0


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